HyperLynx® DDR PE was created especially for Altium, Allegro, CADSTAR, and OrCAD engineers who need powerful analysis of DDR1, DDR2, DDR3, and LPDDR 1/2/3 designs.

HyperLynx DDR PE provides powerful analysis for PCBs with DDR memory, greatly reducing validation and debug cycles. Easily report setup/hold times, overshoot/undershoot, and non-monotonicity in your DDR interface to improve design quality. Measurements can be validated against JEDEC DDR1/2/3 standard values or custom operating points. The detailed simulations take into account board-level effects, such as lossy transmission lines, reflections, impedance changes, effects of vias, ISI, crosstalk, and timing delays, providing a comprehensive view of your memory interface.

Technical Specification

• Wizard-based interface helps analyze DDR1, DDR2, and DDR3 designs, including low-power variants
• Simulate with any number of DRAM devices, from single-memory to multiple-memory modules/slots
• Characterize Signal Integrity (SI) and system-level timing with setup/hold and derating calculations per JEDEC or custom standards
• Includes an HTML-based report with details of timing and SI results
• Supports Altium Designer, OrCAD, Allegro, and CADSTAR
  
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