{
    "id": 4008,
    "date": "2023-04-24T11:37:47",
    "date_gmt": "2023-04-24T11:37:47",
    "guid": {
        "rendered": "https:\/\/www.edmd-solutions.com\/?page_id=4008"
    },
    "modified": "2023-09-01T12:30:11",
    "modified_gmt": "2023-09-01T12:30:11",
    "slug": "modelsim",
    "status": "publish",
    "type": "page",
    "link": "https:\/\/www.edmd-solutions.com\/en\/modelsim\/",
    "title": {
        "rendered": "ModelSim"
    },
    "content": {
        "rendered": "<div data-elementor-type=\"wp-page\" data-elementor-id=\"4008\" class=\"elementor elementor-4008\">\n\t\t\t\t\t\t<section class=\"elementor-section elementor-top-section elementor-element elementor-element-bdb5972 elementor-section-full_width elementor-section-height-default elementor-section-height-default\" data-id=\"bdb5972\" data-element_type=\"section\" data-e-type=\"section\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;}\">\n\t\t\t\t\t\t\t<div class=\"elementor-background-overlay\"><\/div>\n\t\t\t\t\t\t\t<div class=\"elementor-container elementor-column-gap-default\">\n\t\t\t\t\t<div class=\"elementor-column elementor-col-100 elementor-top-column elementor-element elementor-element-5f3cd3d\" data-id=\"5f3cd3d\" data-element_type=\"column\" data-e-type=\"column\">\n\t\t\t<div class=\"elementor-widget-wrap elementor-element-populated\">\n\t\t\t\t\t\t<div class=\"elementor-element elementor-element-11ca51e elementor-widget elementor-widget-heading\" data-id=\"11ca51e\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h1 class=\"elementor-heading-title elementor-size-large\">ModelSim<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<section class=\"elementor-section elementor-top-section elementor-element elementor-element-4962807 elementor-section-full_width elementor-section-height-default elementor-section-height-default\" data-id=\"4962807\" data-element_type=\"section\" data-e-type=\"section\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;}\">\n\t\t\t\t\t\t<div class=\"elementor-container elementor-column-gap-default\">\n\t\t\t\t\t<div class=\"elementor-column elementor-col-100 elementor-top-column elementor-element elementor-element-09e78a0\" data-id=\"09e78a0\" data-element_type=\"column\" data-e-type=\"column\">\n\t\t\t<div class=\"elementor-widget-wrap elementor-element-populated\">\n\t\t\t\t\t\t<div class=\"elementor-element elementor-element-e5f75f4 elementor-widget elementor-widget-heading\" data-id=\"e5f75f4\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h2 class=\"elementor-heading-title elementor-size-large\">ModelSim simulates behavioral, RTL, and gate-level code, including VHDL VITAL and Verilog gate libraries, with timing provided by the standard delay format (SDF).<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-02afe7d elementor-widget elementor-widget-heading\" data-id=\"02afe7d\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">ModelSim\u2019s award-winning Single Kernel Simulator (SKS) technology enables transparent mixing of VHDL and Verilog in one design. Its architecture allows platform-independent compile with the outstanding performance of native compiled code. The graphical user interface is powerful, consistent, and intuitive. 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class=\"pa-gallery-whole-link\" href=\"https:\/\/edmd-solutions.com\/wp-content\/uploads\/2023\/04\/ModelSim-tracking-testing.png\" data-lightbox=\"gal[4008]\" data-elementor-open-lightbox=\"yes\" data-elementor-lightbox-slideshow=\"338dcd5\"><\/a>\n\n\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t<\/div>\n\t\t\t\n\t\t\t\t\t<\/div>\n\n\t\t\n\t<\/div>\n\n\t\t\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-dbe0efb elementor-align-center elementor-widget elementor-widget-button\" data-id=\"dbe0efb\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"button.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<div class=\"elementor-button-wrapper\">\n\t\t\t\t\t<a class=\"elementor-button elementor-button-link elementor-size-sm\" href=\"https:\/\/edmd-solutions.com\/wp-content\/uploads\/2023\/04\/ModelSim-HDL-Simulation-datasheet.pdf\" target=\"_blank\">\n\t\t\t\t\t\t<span class=\"elementor-button-content-wrapper\">\n\t\t\t\t\t\t\t\t\t<span class=\"elementor-button-text\">ModelSim DATASHEET<\/span>\n\t\t\t\t\t<\/span>\n\t\t\t\t\t<\/a>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<section class=\"elementor-section elementor-inner-section elementor-element elementor-element-39750d7 elementor-reverse-mobile elementor-section-boxed elementor-section-height-default elementor-section-height-default\" data-id=\"39750d7\" data-element_type=\"section\" data-e-type=\"section\">\n\t\t\t\t\t\t<div class=\"elementor-container elementor-column-gap-default\">\n\t\t\t\t\t<div class=\"elementor-column elementor-col-100 elementor-inner-column elementor-element elementor-element-017d6f7\" data-id=\"017d6f7\" data-element_type=\"column\" data-e-type=\"column\">\n\t\t\t<div class=\"elementor-widget-wrap elementor-element-populated\">\n\t\t\t\t\t\t<div class=\"elementor-element elementor-element-81a248c elementor-widget elementor-widget-heading\" data-id=\"81a248c\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h3 class=\"elementor-heading-title elementor-size-large\">Features:<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-139e6ec elementor-widget elementor-widget-heading\" data-id=\"139e6ec\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Intelligently engineered graphical user interface (GUI)<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-609d962 elementor-widget elementor-widget-text-editor\" data-id=\"609d962\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>ModelSim&#8217;s intelligently engineered GUI maximizes desktop space and provides an intuitive arrangement of interactive graphical elements (windows, toolbars, menus, etc.). It enhances usability and allows for easy access to the powerful capabilities of ModelSim. Additionally, ModelSim&#8217;s integration of the Tcl scripting language further extends its openness and flexibility.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-46cc4c6 elementor-widget elementor-widget-heading\" data-id=\"46cc4c6\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Memory Window<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-24ea2a1 elementor-widget elementor-widget-text-editor\" data-id=\"24ea2a1\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>The memory window in ModelSim provides a user-friendly and flexible interface for viewing and debugging design memories. VHDL and Verilog memories are automatically extracted from the source code and displayed in the GUI, enabling powerful search, fill, edit, load and save functions. The memory window also supports pre-loading memories from files or using constant, random, and computed value types, eliminating the need to initialize test benches for memory loading. These features can be accessed via the command line, making them suitable for scripting and enhancing efficiency in memory-related tasks.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-b0d94c3 elementor-widget elementor-widget-heading\" data-id=\"b0d94c3\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Waveform and Results Viewing<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-0c291ae elementor-widget elementor-widget-text-editor\" data-id=\"0c291ae\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>ModelSim offers a high-performance Wave window that provides advanced features for waveform analysis. Users can mark specific points in time using cursors and measure time distances between them. The Wave window allows flexible formatting of waveform data through virtual signal definitions and grouping, enabling easy waveform comparisons between different simulation results. ModelSim also provides time-filtering capabilities to handle timing differences between RTL and gate-level simulations. Additionally, ModelSim includes a unique WLF management utility called WLFMAN, which allows users to manipulate WLF result files, control the amount of recorded information, and efficiently manage disk space for post-simulation debugging.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-198fc4a elementor-widget elementor-widget-heading\" data-id=\"198fc4a\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Source Window Templates &amp; Wizards\n<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-d95fbef elementor-widget elementor-widget-text-editor\" data-id=\"d95fbef\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>ModelSim provides VHDL and Verilog templates and wizards that simplify the development of HDL code. These tools eliminate the need to remember complex language syntax by offering pre-defined constructs that can be easily accessed with a mouse click. The user-friendly wizards guide you through the creation of more intricate HDL blocks, including parameterizable logic blocks, testbench stimuli, and design objects. Whether you&#8217;re a beginner or an experienced HDL developer, ModelSim&#8217;s templates and wizards save you time and provide convenient shortcuts for efficient code development.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-8f46e55 elementor-widget elementor-widget-image\" data-id=\"8f46e55\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"image.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<img decoding=\"async\" width=\"860\" height=\"860\" src=\"https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features.webp\" class=\"attachment-full size-full wp-image-4773\" alt=\"ModelSim HDL simulation features\" srcset=\"https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features.webp 860w, https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features-300x300.webp 300w, https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features-150x150.webp 150w, https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features-768x768.webp 768w, https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features-100x100.webp 100w, https:\/\/www.edmd-solutions.com\/wp-content\/uploads\/2023\/05\/ModelSim-HDL-simulation-features-200x200.webp 200w\" sizes=\"(max-width: 860px) 100vw, 860px\" \/>\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-0e183fe elementor-widget elementor-widget-heading\" data-id=\"0e183fe\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Project Manager<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-885a93d elementor-widget elementor-widget-text-editor\" data-id=\"885a93d\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>The Project Manager streamlines file and library organization, saving you time and effort. It automatically saves the specific settings of each project, enabling you to resume simulations from where you left off. With simulation properties, you can easily re-simulate using pre-configured parameters, making the process more efficient and convenient.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-e068978 elementor-widget elementor-widget-heading\" data-id=\"e068978\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Code Coverage<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-069b4a1 elementor-widget elementor-widget-text-editor\" data-id=\"069b4a1\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>Code Coverage is a powerful feature in ModelSim that allows you to measure the completeness of your design verification. It supports various coverage metrics such as statement, expression, condition, toggle, and FSM coverage. These metrics are automatically derived from the HDL source code. With the ability to configure and reuse design blocks, not all metrics may be relevant. That&#8217;s why ModelSim offers flexible management of code coverage metrics using source code pragmas and exclusions specified in the code coverage browser. This feature helps ensure comprehensive verification of your design while allowing you to focus on the metrics that matter most.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-e42cfab elementor-widget elementor-widget-heading\" data-id=\"e42cfab\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Assertion Based Verification<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-6f946aa elementor-widget elementor-widget-text-editor\" data-id=\"6f946aa\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>ModelSim provides a comprehensive and standards-based solution for Assertion Based Verification (ABV). Users have the flexibility to choose between SystemVerilog Assertions (SVA), Property Specification Language (PSL), or utilize both options. This feature enhances the verification process by enabling the specification and verification of complex design properties, ensuring design correctness and reducing time-consuming manual checks.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-6079b76 elementor-widget elementor-widget-heading\" data-id=\"6079b76\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Powerful, Cost-Effective Simulation<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-f6cefd1 elementor-widget elementor-widget-text-editor\" data-id=\"f6cefd1\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>ModelSim offers a powerful and cost-effective simulation solution designed specifically for verifying small and medium-sized FPGA designs, particularly those with complex and mission-critical functionality. With its robust capabilities, ModelSim provides an efficient platform for accurate and thorough verification of FPGA designs, ensuring their reliability and functionality.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-9f1f15b elementor-widget elementor-widget-heading\" data-id=\"9f1f15b\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<p class=\"elementor-heading-title elementor-size-large\">Platform Support<\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-2d25fd7 elementor-widget elementor-widget-text-editor\" data-id=\"2d25fd7\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>ModelSim is compatible with various platforms, including 32\/64-bit Windows 10, Linux RHEL6 and RHEL7, and Linux SLES 11 and SLES 12. It operates in 32-bit mode when running on a 64-bit system, ensuring smooth performance and functionality across different platforms.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-a5029aa elementor-align-center elementor-widget elementor-widget-button\" data-id=\"a5029aa\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"button.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<div class=\"elementor-button-wrapper\">\n\t\t\t\t\t<a class=\"elementor-button elementor-button-link elementor-size-sm\" href=\"https:\/\/www.edmd-solutions.com\/en\/contact\/\">\n\t\t\t\t\t\t<span class=\"elementor-button-content-wrapper\">\n\t\t\t\t\t\t\t\t\t<span class=\"elementor-button-text\">CONTACT US<\/span>\n\t\t\t\t\t<\/span>\n\t\t\t\t\t<\/a>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<\/div>",
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